Year: 2012
Type: article
Abstract: Discrete cosine transform (DCT) is a widely used tool in image and video compression applications.Recently, the high-throughput DCT designs have been adopted to fit the requirements of real-time application.Operating the shifting and addition in parallel, an error-compensated adder-tree (ECAT) is proposed to deal with the truncation errors and to achieve low-error and high-speed discrete cosine transform (DCT) design.Instead of the 12 bits used in previous works, 9-bit Distributed Arithmetic was proposed.DAbased DCT design with an error-compensated adder-tree (ECAT) is the proposed architecture in which, ECAT operates shifting and addition in parallel by unrolling all the words required to be computed.Furthermore, the Error-Compensated Circuit alleviates the truncation error for high accuracy design.Based on low-error ECAT, the DA-precision in this work is chosen to be 9 bits instead of the traditional 12 bits.Therefore, the hardware size and cost is reduced, and the speed is improved using the proposed ECAT.
DOI: 10.9790/2834-0313950
Author: S Indumathi
Institution: Jawaharlal Nehru Technological University, Kakinada
Language: English
Subfield: Signal Processing
Field: Computer Science
Domain: Physical Sciences
Open Access status: bronze
OpenAlex ID: W2017679141