Work

Brain-like infrastructure for embedded SoC diagnosis

Year: 2010

Type: conference-paper

Abstract: This article describes high-speed multiprocessor architecture for the concurrent analyzing information represented in analytic, graph- and table forms of associative relations to search, recognize and make a decision in n-dimensional vector discrete space. Vector-logical process models of actual applications, for which the quality of solution is estimated by the proposed integral non-arithmetical metric of the interaction between Boolean vectors, are described.

Source: IEEE International Conference on Automation, Quality and Testing, Robotics (AQTR)

DOI: 10.1109/aqtr.2010.5520841

Authors: V. I. Hahanov, Wajeb Gharibi, Olesya Guz

Institutions: Kharkiv National University of Radio Electronics, Jazan University

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

OpenAlex ID: W2048456735

FWCI:

Cites: 3

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