Work

Systolic FIR Filter Design with Various Parallel Prefix Adders in FPGA: Performance Analysis

Year: 2012

Type: conference-paper

Source: International Symposium on Electronic System Design

DOI: 10.1109/ised.2012.45

Authors: R. Uma, Jebashini Ponnian

Institution: Pondicherry University

Language: English

Topic: Digital Filter Design and Implementation

Subfield: Signal Processing

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2048612010

FWCI: 0.328

Cites: 15

Cited by: 7

Related to: 9