Work

Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA

Year: 2015

Type: article

Source: IEEE Transactions on Biomedical Circuits and Systems

DOI: 10.1109/tbcas.2015.2389227

Authors: Jun Yeon Won, Sun Il Kwon, Hyun Suk Yoon, Guen Bae Ko, Jeong-Whan Son, Jae Sung Lee

Institution: Seoul National University

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2056848692

FWCI: 3.528

Cites: 18

Cited by: 104

Related to: 10