Work

Multilevel hypergraph partitioning: applications in VLSI domain

Year: 1999

Type: article

Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI: 10.1109/92.748202

Authors: G. Karypis, R. Aggarwal, V. Kumar, S. Shekhar

Institutions: University of Minnesota, Lattice Semiconductor (United States)

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2078174680

FWCI: 15.62

Cites: 34

Cited by: 824

Related to: 9