Work

Efficient trace-driven simulation method for cache performance analysis

Year: 1990

Type: conference-paper

Abstract: We propose improvements to current trace-driven cache simulation methods to make them faster and more economical. We attack the large time and space demands of cache simulation in two ways. First, we reduce the program traces to the extent that exact performance can still be obtained from the reduced traces. Second, we devise an algorithm that can produce performance results for a variety of metrics (hit ratio, write-back counts, bus traffic) for a large number of set-associative write-back caches in just a single simulation run. The trace reduction and the efficient simulation techniques are extended to parallel multiprocessor cache simulations. Our simulation results show that our approach substantially reduces the disk space needed to store the program traces and can dramatically speedup cache simulations and still produce the exact results.

Source: ACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS)

DOI: 10.1145/98457.98497

Authors: Wen-Hann Wang, Jean-Loup Baer

Institutions: IBM (United States), IBM Research - Thomas J. Watson Research Center, University of Washington

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: bronze

Funder: National Science Foundation

Awards: Memory Management in Shared-Memory Multiprocessors, Effective Use of Parallel Computing