Work

Reconfigurable synchronized dataflow processor

Year: 2000

Type: conference-paper

Abstract: This paper describes the design and implementation of a reconfigurable synchronized dataflow processor (RSDP).The RSDP can configure its hardware to directly represent dataflow graphs (DFGs) of applications.Data are processed while they flow along application-specific datapaths in the RSDP.We have designed three DFGs for benchmarking and evaluated their performance on an RSDP board.The results show that the RSDP running at relatively lower frequency can achieve a competitive performance with a general-purpose processor.

Source: Asia and South Pacific Design Automation Conference (ASP-DAC)

DOI: 10.1145/368434.368490

Authors: H. Sasaki, H. Maruyama, H. Kobayashi, T. Nakamura, H. Tsukioka, N. Shoji

Institution: Tohoku University

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: bronze

OpenAlex ID: W2097374713

FWCI:

Cites: 4

Cited by: 2

Related to: 10