High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices
Year: 2006
Type: article
Source: IEEE Electron Device Letters
Institution: Institute of Microelectronics
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2106998413
