Work

Simulation based deadlock analysis for system level designs

Year: 2005

Type: conference-abstract

Source: ACM/IEEE Design Automation Conference (DAC)

DOI: 10.1145/1065579.1065647

Authors: Xi Chen, Abhijit Davare, Harry Hsieh, Alberto Sangiovanni-Vincentelli, Yosinori Watanabe

Institutions: University of California, Riverside, University of California, Berkeley

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2111852129

Cites: 18

Cited by: 13

Related to: 10