Work

Clock period optimization in a multiphase edge-clocked circuit constrained to a maximum number of phases

Year: 2002

Type: conference-paper

Source: EUROMICRO Conference

DOI: 10.1109/emscnt.1997.658460

Authors: F. Fernandez, A. Sanchez

Institution: Universidad Politécnica de Madrid

Language: English

Topic: VLSI and FPGA Design Techniques

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2163118204

FWCI:

Cites: 4

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Related to: 10