P/sup 3/A: a partitionable parallel/pipeline architecture for real-time image processing
Year: 2002
Type: conference-paper
Authors: C.T. Gray, W. Liu, T. Hughes, R. Cavin, S.-s. Chen
Language: English
Subfield: Hardware and Architecture
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2171504998
