Work

Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique

Year: 2016

Type: conference-paper

Abstract: The insertion of malicious alterations to a circuit, referred to as Hardware Trojans, is a threat considered more and more seriously during the last years. Numerous methods have been proposed in the literature to detect the presence of such alterations. More recently, Design-for-Hardware-Trust (DfHT) methods have been proposed, that enhance the design of the circuit in order to incorporate features that can either prevent the insertion of a HT or that can help detection methods. This paper focuses on a HT prevention technique that aims at creating a layout without filler cells, which are assumed to provide a great opportunity for HT insertion, in order to make the insertion of a HT in a layout as difficult as possible.

Source: IEEE Computer Society Annual Symposium on VLSI

DOI: 10.1109/isvlsi.2016.22

Authors: Papa-Sidy Ba, Sophie Dupuis, Manikandan Palanichamy, Marie-Lise Flottes, Giorgio Di Natale, Bruno Rouzeyre

Institutions: Université de Montpellier, Laboratoire d'Informatique, de Robotique et de Microélectronique de Montpellier

Language: English

Topic: Physical Unclonable Functions (PUFs) and Hardware Security

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

OpenAlex ID: W2484886826

FWCI: 0.77

Cites: 21

Cited by: 31

Related to: 10