Work

Mixed-size concurrency: ARM, POWER, C/C++11, and SC

Year: 2016

Type: conference-paper

Abstract: Previous work on the semantics of relaxed shared-memory concurrency has only considered the case in which each load reads the data of exactly one store. In practice, however, multiprocessors support mixed-size accesses, and these are used by systems software and (to some degree) exposed at the C/C++ language level. A semantic foundation for software, therefore, has to address them.

Source: ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL)

DOI: 10.1145/3009837.3009839

Authors: Shaked Flur, Susmit Sarkar, Christopher Pulte, Kyndylan Nienhuis, Luc Maranget, Kathryn E. Gray, Ali Sezgin, Mark Batty, Peter Sewell

Institutions: University of Cambridge, University of St Andrews, Institut national de recherche en sciences et technologies du numérique, University of Kent

Language: English

Topic: Distributed systems and fault tolerance

Subfield: Computer Networks and Communications

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

Funders: Bill and Melinda Gates Foundation, Engineering and Physical Sciences Research Council

Awards: C3: Scalable & Verified Shared Memory via Consistency-directed Cache Coherence, REMS: Rigorous Engineering for Mainstream Systems, Multiprocessors: From Microarchitecture to Semantic Theory

OpenAlex ID: W2559594945

FWCI: 2.307

Cites: 58

Cited by: 40

Related to: 10