CAIRN3: An FPGA Implementation of the Sieving Step with the Lattice Sieving
Year: 2007
Type: article
Authors: Takeshi Shimoyama, Tetsuya Izu, Jun Kogure
Institution: Fujitsu (Japan)
Language: English
Subfield: Information Systems
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2741799631
