Work

Multi-level active gate driver for SiC MOSFETs

Year: 2017

Type: conference-paper

Abstract: Active gate driving has been shown to provide reduced circuit losses and improved switching waveform quality in power electronic circuits. An integrated active gate driver with 150 ps resolution has previously been shown to offer the expected benefits in GaN-based converters. However, the use of low-voltage, high-speed transistors limits its output voltage range to 5 V, too low for many emerging SiC and GaN devices. This paper introduces a series connection of two commercially available conventional drivers and an improved 5 V, 100 ps resolution active driver. The first conventional driver lifts the gate voltage from the negative hold-off voltage to just below the gate threshold voltage, the active driver performs active high-resolution control around the gate threshold, after which the second conventional driver raises the gate voltage to reach optimal Rdsonvalues. This driver is demonstrated on a 900-V SiC MOSFET that requires a 15 V onstate gate voltage to achieve optimum Rdson. The device is switched at 50 V/ns in a 100-kHz, non-synchronous, 1:10, 300-W boost converter, with the power device switching 600 V and 5 A. It is shown that the gate voltage can be affected on a 100 ps scale, and that meaningful changes to fast power waveforms can be achieved.

Source: IEEE Energy Conversion Congress and Exposition (ECCE)

DOI: 10.1109/ecce.2017.8096860

Authors: Harry C. P. Dymond, Dawei Liu, Jianjing Wang, Jeremy J. O. Dalton, Bernard H. Stark

Institution: University of Bristol

Language: English

Topic: Silicon Carbide Semiconductor Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: green

Funder: Engineering and Physical Sciences Research Council