Work

A tunnel FET compact model including non-idealities with verilog implementation

Year: 2018

Type: article

Source: Solid-State Electronics

DOI: 10.1016/j.sse.2018.09.001

Authors: Redwan N. Sajjad, Ujwal Radhakrishna, Dimitri A. Antoniadis

Institutions: Bangladesh University of Engineering and Technology, Massachusetts Institute of Technology

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: bronze

Funders: National Science Foundation, Semiconductor Research Corporation

Awards: G2116205080, Center for Energy Efficient Electronics Science (Center for E3S)

OpenAlex ID: W2810038870

FWCI: 0.282

Cites: 26

Cited by: 3

Related to: 10