Work

19.1 Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOS

Year: 2019

Type: conference-paper

Source: Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference

DOI: 10.1109/isscc.2019.8662486

Authors: Fahim ur Rahman, Rajesh Pamula, Akshat Boora, Xun Sun, Visvesh Sathe

Institution: University of Washington

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Affordable and clean energy

Open Access status: closed

OpenAlex ID: W2922167313

FWCI: 3.96

Cites: 7

Cited by: 14

Related to: 10