Work

Computing via material topology optimisation

Year: 2017

Type: preprint

Abstract: We construct logical gates via topology optimisation (aimed to solve a station problem of heat conduction) of a conductive material layout. Values of logical variables are represented high and low values of a temperature at given sites. Logical functions are implemented via the formation of an optimum layout of conductive material between the sites with loading conditions. We implement AND and XOR gates and a one-bit binary half-adder.

Source: arXiv (Cornell University)

DOI: 10.48550/arxiv.1707.07024

Authors: Safonov, Alexander, Adamatzky, Andrew

Institutions: Skolkovo Institute of Science and Technology, University of the West of England

Language: English

Topic: Topology Optimization in Engineering

Subfield: Civil and Structural Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: green

OpenAlex ID: W2952944079

Cites: 23

Cited by:

Related to: 20