Work

Wireless Chip-Scale Communications for Neural Network Accelerators

Year: 2019
Type: dissertation
Abstract: Wireless on-chip communications have been proposed as a complement to conventional Network-on-Chip (NoC) paradigms in manycore processors. In massively parallel architectures, the fast broadcast and reconfigurability capabilities of the wireless plane open the door to new scalable and adaptive architectures with significant impact on a plethora of fields. This thesis aims to explore such impact in the all-pervasive field of AI accelerators, designing and evaluating new accelerators augmented with wireless on-chip communication.
Language: English
Open Access status: green
OpenAlex ID: W2955006307
Cites: 84
Cited by: 2
Related to: 10