Work

Design Considerations for Efficient Deep Neural Networks on Processing-in-Memory Accelerators

Year: 2019

Type: conference-paper

Abstract: This paper describes various design considerations for deep neural networks that enable them to operate efficiently and accurately on processing-in-memory accelerators. We highlight important properties of these accelerators and the resulting design considerations using experiments conducted on various state-of-the- art deep neural networks with the large-scale ImageNet dataset.

Source: Technical digest - International Electron Devices Meeting/Technical digest

DOI: 10.1109/iedm19573.2019.8993662

Authors: Tien-Ju Yang, Vivienne Sze

Institution: Massachusetts Institute of Technology

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

Funders: National Science Foundation, Quest for Intelligence, Massachusetts Institute of Technology

Awards: E2CDA: Type II: Memory, Logic, and Logic in Memory Using Three Terminal Magnetic Tunnel Junctions, G6053735285