Year: 2019
Type: dissertation
Abstract: Stochastic computing (SC) is an unconventional technique that has recently re-emerged as an attractive design alternative to conventional binary computing (BC). SC represents data using probabilistic bit-streams, whose value is associated with their frequency of 1s and 0s. Such a highly unusual data format allows arithmetic operations, including multiplication and addition, to be implemented with extremely simple circuits, hinting at exceptionally low power and small size. These SC features show great promise in tasks like image processing and machine learning that can benefit from massive parallelism. However, SC’s inherently random nature also presents several design challenges, such as long computation time, unpredictable SC behavior, and errors induced by random fluctuation and correlation. These issues have limited the use of SC to applications that can tolerate errors or only require low precision. This dissertation begins by investigating SC’s major error sources. We observe that many SC designs use internal constant signals that we show to be a major contributor to random fluctuation errors. We then devise a new design method that eliminates these errors by transferring the role of constant signals to memory components within sequential stochastic circuits. We also examine methods to remove correlation errors in SC, focusing on a decorrelation method called isolation that works by inserting sequential delay elements. As isolation has been used in non-optimal ways previously, we propose a novel isolation-based method that introduces minimal hardware overhead. Noting that both of the foregoing error-elimination methods rely on sequential elements, we next study the overall role of sequential components in SC. We identify several new classes of sequential stochastic circuits, and analyze their properties in depth. This leads to a circuit optimization method that exploits stochastically equivalent state-transitions in sequential circuits. Many SC systems are actually a hybrid of BC and SC features. Connecting these two types of computation technologies usually introduces considerable hardware and latency overhead. We examine the BC-SC interface, and propose a new hybrid architecture that can replace some such interfaces without introducing more latency than necessary. Finally, we explore a new opportunity in SC by viewing SC-style randomness as a design resource instead of an error source. We further propose a sequential element that can inject a precise amount of randomness into SC computation, which benefits applications that need randomness, such as image dithering and neural-network hardening. The dissertation concludes with a discussion of some promising directions for future SC research.
Author: Paishun Ting
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W3009443146