Work

Multi-channel time-tagging module for fast-timing Resistive Plate Chamber detectors

Year: 2020

Type: conference-paper

Abstract: A multi-channel time-tagging module is proposed for fast timing resistive plate chamber (RPC) detectors. It has been designed and implemented in a low-end and low-power cyclone V FPGA. Each channel mainly consists of a time-to-digital converter (TDC) in tapped-delay-line (TDL) architecture. The TDC has three main building blocks: tapped delay line (with registers and a AND logic), fine timestamp converter, and coarse timestamp generator. Several data processing techniques, including prior signal reshaping and noise-immune processing, have been adopted to minimize noise effects. The module has successfully been tested in all-channel simultaneous operation conditions, with 11 ps to 20 ps time resolution and full event-detecting efficiency for all the channels.

Source: Topical Workshop on Electronics for Particle Physics (TWEPP)

DOI: 10.22323/1.370.0093

Authors: Xiushan Chen, C. Combaret, C. Girerd, C. Guerin, I. Laktineh, X. Lin-Ma, L. Mirabito, G-n Lu

Institutions: Université de Lyon, Institut de Physique des 2 Infinis de Lyon, Centre National de la Recherche Scientifique, Institut de Physique, Institut National de Physique Nucléaire et de Physique des Particules, Institut des Nanotechnologies de Lyon

Language: English

Topic: Particle Detector Development and Performance

Subfield: Nuclear and High Energy Physics

Field: Physics and Astronomy

Domain: Physical Sciences

Open Access status: hybrid

OpenAlex ID: W3017405694

FWCI: 2.56

Cites: 6

Cited by: 6

Related to: 10