Work

Automatic microarchitectural pipelining

Year: 2010

Type: conference-paper

Abstract: This paper presents a method for automatic microarchitectural pipelining of systems with loops. The original specification is pipelined by performing provably-correct transformations including conversion to a synchronous elastic form, early evaluation, inserting empty buffers, anti-tokens, and retiming. The design exploration is done by solving an optimization problem followed by simulation of solutions. The method is explained on a DLX microprocessor example. The impact of different microarchitectural parameters on the performance is analyzed.

Source: Design, Automation, and Test in Europe

DOI: 10.1109/date.2010.5456910

Authors: Marc Galceran-Oms, Jordi Cortadella, Dmitry Bufistov, Mike Kishinevsky

Institutions: Universitat Politècnica de Catalunya, Intel (United States)

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: green

OpenAlex ID: W3146834460

FWCI: 0.718

Cites: 19

Cited by: 16

Related to: 10