Design of ESD Protection Circuits for LNA Using 65-nm CMOS Technology
Year: 2021
Type: conference-paper
Authors: Lakshmi Nair, Karthigha Balamurugan, M Jayakumar
Institution: Amrita Vishwa Vidyapeetham
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4212895356
