Architectural core salvaging in a multi-core processor for hard-error tolerance
Year: 2009
Type: article
Authors: Michael D. Powell, Arijit Biswas, Shantanu Gupta, Shubhendu S. Mukherjee
Institutions: Intel (United States), University of Michigan
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4237087767