Work

A preliminary architecture for a basic data-flow processor

Year: 1975

Type: conference-paper

Abstract: A processor is described which can achieve highly parallel execution of programs represented in data-flow form. The language implemented incorporates conditional and iteration mechanisms, and the processor is a step toward a practical data-flow processor for a Fortran-level data-flow language. The processor has a unique architecture which avoids the problems of processor switching and memory/processor interconnecion that usually limit the degree of realizable concurrent processing. The architecture offers an unusual solution to the problem of structuring and managing a two-level memory system.

Source: Proceedings - International Symposium on Computer Architecture/Proceedings

DOI: 10.1145/642089.642111

Authors: Jack B. Dennis, David P. Misunas

Institution: Massachusetts Institute of Technology

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: bronze

OpenAlex ID: W4239997146

FWCI: 3.077

Cites: 4

Cited by: 227

Related to: 10