Work

A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays

Year: 2022

Type: conference-paper

Source: IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)

DOI: 10.1109/vlsitechnologyandcir46769.2022.9830211

Authors: Hongwu Jiang, Wantong Li, Shanshi Huang, Shimeng Yu

Institution: Georgia Institute of Technology

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4286571956

FWCI: 18.04

Cites:

Cited by: 63

Related to: 10