Work

Utopia: Fast and Efficient Address Translation via Hybrid Restrictive & Flexible Virtual-to-Physical Address Mappings

Year: 2023

Type: conference-paper

Abstract: Conventional virtual memory (VM) frameworks enable a virtual address to flexibly map to any physical address. This flexibility necessitates large data structures to store virtual-to-physical mappings, which leads to high address translation latency and large translation-induced interference in the memory hierarchy, especially in data-intensive workloads. On the other hand, restricting the address mapping so that a virtual address can only map to a specific set of physical addresses can significantly reduce address translation overheads by making use of compact and efficient translation structures. However, restricting the address mapping flexibility across the entire main memory severely limits data sharing across different processes and increases data accesses to the swap space of the storage device even in the presence of free memory.

Source: IEEE/ACM International Symposium on Microarchitecture (MICRO)

DOI: 10.1145/3613424.3623789

Authors: Konstantinos Kanellopoulos, Rahul Bera, Kosta Stojiljkovic, F. Nisa Bostanci, Can Firtina, Rachata Ausavarungnirun, Rakesh Kumar, Nastaran Hajinazar, Mohammad Sadrosadati, Nandita Vijaykumar, Onur Mutlu

Institutions: ETH Zurich, King Mongkut's University of Technology North Bangkok, Norwegian University of Science and Technology, Intel (United States), University of Toronto

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: bronze

Funders: Semiconductor Research Corporation, VMware

OpenAlex ID: W4389476308

FWCI: 2.584

Cites: 109

Cited by: 15

Related to: 10