Work

Time-Based Compute-in-Memory for Cryogenic Neural Network With Successive Approximation Register Time-to-Digital Converter

Year: 2022

Type: article

Abstract: This article explores a compute-in-memory (CIM) paradigm’s new application for cryogenic neural network. Using the 28-nm cryogenic transistor model calibrated at 4 K, the time-based CIM macro comprised of the following: 1) area-efficient unit delay cell design for cryogenic operation and 2) area and power efficient, and a high-resolution achievable successive approximation register (SAR) time-to-digital converter (TDC) is proposed. The benchmark simulation first shows that the proposed macro has better latency than the current-based CIM counterpart. Next, the simulation further shows that it has better scalability for a larger size decoder design and process technology optimization.

Source: IEEE Journal on Exploratory Solid-State Computational Devices and Circuits

DOI: 10.1109/jxcdc.2022.3225243

Authors: Dong Suk Kang, Shimeng Yu

Institution: Georgia Institute of Technology

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: gold

Estimated APC paid: $1,850

Funders: National Science Foundation, Georgia Institute of Technology