Work

Experiences of running an HPC RISC-V testbed

Year: 2023

Type: preprint

Abstract: Funded by the UK ExCALIBUR H\&ES exascale programme, in early 2022 a RISC-V testbed for HPC was stood up to provide free access for scientific software developers to experiment with RISC-V for their workloads. Here we report on successes, challenges, and lessons learnt from this activity with a view to better understanding the suitability of RISC-V for HPC and important areas to focus RISC-V HPC community efforts upon.

Source: arXiv (Cornell University)

DOI: 10.48550/arxiv.2305.00512

Authors: Brown, Nick, Jamieson, Maurice, Lee, Joseph K. L.

Institution: University of Edinburgh

Language: English

Topic: Parallel Computing and Optimization Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: green

OpenAlex ID: W4367694345

Cites:

Cited by: 1

Related to: 10