Work

Wafer-level High-aspect-ratio Deep Reactive Ion Etching of 4h-silicon Carbide on Insulator Substrates

Year: 2022

Type: conference-paper

Abstract: This paper reports on the results of high-aspect-ratio (HAR) Deep Reactive Ion Etching (DRIE) of thick 4H-SiC on Insulator (SiCOI) substrates at wafer-level and outlines the progress and challenges.Different size vertical trenches with high aspect-ratios of 15:1 ~ 20:1 and smooth sidewalls were achieved using electroplated nickel mask on 100mm SiC wafer, and a trench depth uniformity of 2% (±1µm) was measured across the wafer.The transferred recipe on SiCOI substrate was able to reach the buried oxide on all corners of the patterned SiCOI area while it created footing less than 100nm.The trench taper angle was 88.5º with a smooth sidewall, roughness < 120nm, resulting in 4H-SiC bulk acoustic wave resonators with Qs > 2M.These HAR DRIE results at wafer-level are a promising step to enable volumemanufacturing of ultra-high Q SiC resonators, which was previously done at die/small piece level.

Source: Solid-State Sensors, Actuators, and Microsystems Workshop (Hilton Head Workshop)

DOI: 10.31438/trf.hh2022.98