Year: 2024
Type: preprint
Abstract: We propose a novel and efficient, custom frame synchronization architecture aimed at rapid deployment on any hardware platform. Frame synchronization is the process of discerning valid data frames from an incoming transmission and in this article it is accomplished by attaching distinctive binary overhead sequences on the frame. These sequences act as markers for the frames and enable the capture of their payload. They have certain properties and can be detected by using only simple hardware constructs like XNOR gates and few-bit adders with adequate accuracy. A low-cost commercial FPGA was used for implementation (NEXYS 4 DDR).
Source: arXiv (Cornell University)
Author: Nikolaidis, Dimitris
Institution: National Technical University of Athens
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: green
OpenAlex ID: W4394868175