Work

A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and Equalization Techniques for Next-Generation Memory Interfaces

Year: 2024

Type: article

Source: IEEE Transactions on Circuits and Systems I Regular Papers

DOI: 10.1109/tcsi.2024.3408648

Authors: Hyuntae Kim, Yunseong Jo, Sanghun Lee, Eunsang Lee, Young Choi, Jaewoo Park, Myoungbo Kwak, Jung-Hwan Choi, Youngdon Choi, Jaeduk Han

Institutions: Hanyang University, Samsung (South Korea), Samsung Electronics (South Korea)

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: Samsung

OpenAlex ID: W4399568415

FWCI: 1.752

Cites: 19

Cited by: 17

Related to: 10