Work

SmartSiC™ Substrates: A Boon to Drain Metallization Process

Year: 2024
Type: article
Abstract: We present results of epitaxial characterization and benchmarking of Silicon Carbide (SiC) epitaxial layers grown on both 6-inch commercially available SiC substrate and on SOITEC’s new generation SmartSiCTM substrate. Multi wafer reactor was utilized to avoid run-to-run variation. Schottky Barrier Diodes (SBD) and electrical test vehicles were fabricated to extract ideality factor, barrier height and ohmic contact resistance for benchmarking.
Institution: Soitec (France)
Language: English
Open Access status: hybrid
OpenAlex ID: W4402122515
FWCI:
Cites: 3
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Related to: 10