Work

A 10-Bit 500-MS/s Pipelined SAR ADC With Nonlinearity-Compensated Open-Loop Amplifier and Parallel Conversion Through Comparator Reusing

Year: 2024

Type: article

Source: IEEE Transactions on Circuits & Systems II Express Briefs

DOI: 10.1109/tcsii.2024.3462557

Authors: Nannan Li, Hanrui Zhang, Bin Liu, Lei Pei, Jinfu Wang, Huanhuan Qi, Jie Zhang, Xiaofei Wang, Hong Zhang

Institution: Xi'an Jiaotong University

Language: English

Topic: Analog and Mixed-Signal Circuit Design

Subfield: Biomedical Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funders: National Natural Science Foundation of China, National Key Research and Development Program of China

Awards: G3600879377, G4781839322

OpenAlex ID: W4402568794

FWCI: 0.627

Cites: 13

Cited by: 6

Related to: 10