Worst-Case Analysis of the Soundness of Efficient Verifiable Delay Function
Year: 2024
Type: conference-paper
Authors: Souvik Sur, Dipanwita Roychowdhury
Institution: Indian Institute of Technology Kharagpur
Language: English
Subfield: Artificial Intelligence
Field: Computer Science
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W4402594548
