Work

Hybrid Logic Style CMOS Full Adder Using 10-T XOR & XNOR Circuit

Year: 2024

Type: conference-paper

Source: International Conference on Circuit, Power and Computing Technologies

DOI: 10.1109/iccpct61902.2024.10672927

Authors: N. Suresh, Dhanalakshmi Gopal, A. Rosi, P. Sivakumar, D. Ferlin Deva Shahila, Ashwini. A

Institution: Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4402660033

FWCI: 0.806

Cites: 9

Cited by: 1

Related to: 10