Work

Design and Investigation of Junction-less TFET (JL-TFET) for the Realization of Logic Gates

Year: 2024

Type: article

Source: NANO

DOI: 10.1142/s1793292024501601

Authors: Bhushit Shah, Prabhat Singh, Ashish Raman, Nagendra Pratap Singh

Institution: Dr. B. R. Ambedkar National Institute of Technology Jalandhar

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Affordable and clean energy

Open Access status: closed

OpenAlex ID: W4402689254

FWCI: 1.561

Cites: 49

Cited by: 15

Related to: 10