Work

A Novel Neuromorphic Hardware Using Area-Efficient Chain RRAM-Based Synapses and Compact Neurons With (Anti-) Integration Scheme

Year: 2024

Type: article

Source: IEEE Transactions on Circuits and Systems I Regular Papers

DOI: 10.1109/tcsi.2024.3458436

Authors: Qiqiao Wu, Honghu Yang, Yixuan Liu, Yue Cao, Yongkang Han, Haijun Jiang, Keji Zhou, Hailan Yi, Jianguo Yang, Qi Liu

Institutions: Fudan University, University of Science and Technology of China, Shanghai Zhangjiang Laboratory, Zhangjiang Laboratory

Language: English

Topic: Advanced Memory and Neural Computing

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funder: National Natural Science Foundation of China

Awards: G4133108643, G417164712, G6200683350, G6558924418, G8031315765

OpenAlex ID: W4402742364

FWCI: 0.308

Cites: 53

Cited by: 3

Related to: 10