Toggle SOT-MRAM Architecture With Self-Terminating Write Operation
Year: 2024
Type: article
Abstract: Toggle spin-orbit torque (SOT)-driven magnetoresistive random access memory (MRAM) with perpendicular anisotropy has a simple material stack and is more robust than directional SOT-MRAM. However, a read-before-write operation is required to use the toggle SOT-MRAM for directional switching, which threatens to increase the write delay. To resolve these issues, we propose a high-speed memory architecture for toggle SOT-MRAM that includes a minimum-sized bit cell and a custom read-write driver. The proposed driver induces an analog self-terminating SOT current that functions via an analog feedback mechanism that can read and write the toggle SOT-MRAM bit cell within a single clock cycle. As the read and write operations are completed within 570 ps, this memory architecture provides the first viable solution for nonvolatile L3 cache.
Authors: Ebenezer C. Usih, Naimul Hassan, Alexander J. Edwards, Felipe Garcia-Sanchez, Pedram Khalili Amiri, Joseph S. Friedman
Language: English
Subfield: Atomic and Molecular Physics, and Optics
Field: Physics and Astronomy
Domain: Physical Sciences
Open Access status: green
Funder: National Science Foundation
Awards: NSF-BSF: CNS Core: Small: Reliable and Zero-Power Timekeepers for Intermittently Powered Computing Devices via Stochastic Magnetic Tunnel Junctions, CAREER: Bottom-Up Localized Online Learning with Spintronic Neuromorphic Networks, PFI-RP: Partnership to develop next-generation memory chips for intelligent computing systems.
OpenAlex ID: W4403277435
