Work

LORA: A Latency-Oriented Recurrent Architecture for GPT Model on Multi-FPGA Platform with Communication Optimization

Year: 2024

Type: conference-paper

Source: International Conference on Field Programmable Logic and Applications (FPL)

DOI: 10.1109/fpl64840.2024.00053

Authors: ZhenDong Zheng, Qianyu Cheng, Teng Wang, Lei Gong, Xianglan Chen, Cheng Tang, Chao Wang, Xuehai Zhou

Institution: University of Science and Technology of China

Language: English

Topic: Embedded Systems Design Techniques

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

Open Access status: closed

Funders: National Natural Science Foundation of China, Youth Innovation Promotion Association

OpenAlex ID: W4403278343

FWCI:

Cites: 13

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Related to: 10