Work

Investigating the Tapered Profiles on the Parasitic Inductance of Through-Silicon Vias

Year: 2024

Type: article

Source: IEEE Transactions on Components Packaging and Manufacturing Technology

DOI: 10.1109/tcpmt.2024.3480697

Authors: Jinxu Liu, Jihua Zhang, Zhen Fang, Hongwei Chen, Libin Gao, Wenlei Li, Tianpeng Liang, Wanli Zhang

Institutions: University of Electronic Science and Technology of China, State Key Laboratory of Electronic Thin Films and Integrated Devices, Chengdu University of Technology

Language: English

Topic: 3D IC and TSV technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

Funder: Fundamental Research Funds for the Central Universities

Award: G3553091275

OpenAlex ID: W4403390496

FWCI: 0.206

Cites: 14

Cited by: 2

Related to: 10