Threshold voltage instability of SiC MOSFETs under very‐high temperature and wide gate bias
Year: 2024
Type: article
Abstract: Threshold voltage ( V TH ) instability affects the reliability of silicon carbide (SiC) MOSFETs. In this article, the influence of gate bias ( V GS ) and high temperature on V TH instability is investigated under wide V GS and very‐high temperature range (150°C to 275°C). The degradation mechanism of gate oxide under coupling of different electrical and thermal stress is revealed. When the device is subjected to + V GS, the relationship between V TH shift and temperature is not monotonic and there is a temperature turning point. This is mainly related to the capture/release and generation of electron traps. However, the V TH shift increases sharply and gate oxide breakdown for the device bias at +35 V, which is related to Fowler–Nordheim (F–N) tunnelling effect. For a large − V GS , the V TH shift is very small. Moreover, when the negative V GS decreases, the V TH shift is positively correlated with temperature, which may result from the activation and charge exchange of hole traps. However, the influence of moving ions changes the temperature dependence of V TH shift for the device bias at −30 V. Finally, the devices of different manufacturers are studied and similar change patterns are found. This finding provides guidance for the further application of SiC MOSFETs under high temperatures and different voltages.
Source: IET Power Electronics
DOI: 10.1049/pel2.12786
Authors: Cong Chen, Yumeng Cai, Peng Sun, Zhibin Zhao
Institution: North China Electric Power University
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: gold
Estimated APC paid: $2,880
Funder: State Grid Corporation of China
Award: G1786646227
OpenAlex ID: W4403545260
