Work

A NRZ/PAM4 SST TX in 5nm FinFET CMOS with 3-tap FFE and 0.7pJ/b efficiency at 100 Gb/s PAM4

Year: 2024

Type: conference-paper

DOI: 10.1109/esserc62670.2024.10719524

Authors: Marcel Kossel, Matthias Brändli, Pier Andrea Francese, Thomas Morf

Institution: IBM Research - Zurich

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4403676817

FWCI:

Cites: 4

Cited by:

Related to: 10