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A 4.86-pJ/b Energy-Efficient Fully Parallel Stochastic LDPC Decoder With Two-Stage Shared Memory

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Year: 2024
Type: article
Source: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI: 10.1109/tvlsi.2024.3488716
Authors: Yakun Zhou, Jienan Chen, Yizhuo Zhou, Zihan Xia, Chuan Zhang, Runsheng Wang
Institutions: University of Electronic Science and Technology of China, Southeast University, Peking University
Language: English

Topic: Error Correcting Code Techniques
Subfield: Computer Networks and Communications
Field: Computer Science
Domain: Physical Sciences
SDGs: Affordable and clean energy, Industry, innovation and infrastructure

Open Access status: closed

Funders: Yunnan Key Research and Development Program, National Key Research and Development Program of China, Fundamental Research Funds for the Central Universities
Awards: G1678299440, G3241307724, G7115951053
OpenAlex ID: W4404177433
FWCI: 0.172
Cites: 16
Cited by: 1
Related to: 10
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