I – V Hysteresis in ESD Protection SCR Due to Jumping Between Bulk and Surface Current Paths
Year: 2024
Type: article
Abstract: The origin of an I–V hysteresis and sharp snapback of single finger silicon-controlled rectifiers (SCRs) for system-level electrostatic discharge (ESD) protection is investigated experimentally and by 2-D technology computer-aided design (TCAD) simulation. Emission microscopy (EMMI) measurements indicate spatial changes in current flow, which is reproduced in simulations using up and down current sweeps. A bulk current path, via two serially connected n-p-n transistors, comprising buried layers (BLs) gives rise to a high-voltage I–V (HV-IV) branch. The sharp snapback is caused by a sudden jump of the current path from the bulk to surface region, thus activating the SCR. The TCAD reveals that charge conditions at the surface determine the stability of the bulk path, and thus the existence of the hysteresis, via the location of impact ionization generation source. The results are important for understanding the complex interplay and coupling of parallel current paths in SCRs.
Institution: TU Wien
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: hybrid
Estimated APC paid: $2,495
OpenAlex ID: W4404239086