Work

Temperature Compensation in FD-SOI Transistors: A Novel Approach with 27% Performance Improvement via Parasitic Diode Biasing

Year: 2024

Type: conference-paper

Source: IEEE International Conference on Electronics, Circuits and Systems (ICECS)

DOI: 10.1109/icecs61496.2024.10848948

Authors: Maxime Guillot, Yann Deval, Hervé Lapuyade, François Rivet

Institutions: Centre National de la Recherche Scientifique, Université de Bordeaux, Laboratoire de l'Intégration du Matériau au Système, Institut Polytechnique de Bordeaux

Language: English

Topic: Advancements in Semiconductor Devices and Circuit Design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4404502722

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