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Combining MTCMOS and Stack Techniques for Low-Power VLSI: A Case Study of a 4-Bit Asynchronous Up Counter

Year: 2024

Type: conference-paper

Source: IEEE Region 10 Symposium (TENSYMP)

DOI: 10.1109/tensymp61132.2024.10752186

Authors: N. Neelima, K. Nishanth Rao, Patteti Krishna, M. Ashritha, M. Srivani, P.Sruthi Sree

Institution: Netaji Subhas University of Technology

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDGs: Industry, innovation and infrastructure, Affordable and clean energy

Open Access status: closed

OpenAlex ID: W4404521303

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Related to: 10