Work

PCIe Gen 6.0 SSD PSIJ Estimation Based on Early Design Stage Jitter Sensitivity Measurements

Year: 2024

Type: conference-paper

Source: IEEE Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

DOI: 10.1109/epeps61853.2024.10754554

Authors: Youngjun Ko, Jinwook Song, Seokwoo Hong, Jinan Lee, Jonghee Jeong, Sungwoo Jin, Hyunwoo Kim, Chorom Jang, Sungwon Roh, Dongho Choi, Kyungsuk Kim, Sunghoon Chun

Institutions: Samsung (South Korea), Samsung Electronics (South Korea)

Language: English

Topic: Advancements in PLL and VCO Technologies

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W4404577449

FWCI: 1.612

Cites: 3

Cited by: 2

Related to: 10