Work

A low-power single ended half-select free 7 T SRAM cell with improved write margin at 32 nm technology node

Year: 2024

Type: article

Source: Physica Scripta

DOI: 10.1088/1402-4896/ad96f3

Authors: Arunima Tripathi, Ayush Dahiya, Poornima Mittal

Institution: Delhi Technological University

Language: English

Topic: Low-power high-performance VLSI design

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W4404685957

FWCI: 0.615

Cites: 32

Cited by: 6

Related to: 10